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Search - GALOIS FIELD MULTIPLIER VERILOG

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[VHDL-FPGA-Verilog] c17_GF_multiple

Description: 精通verilog HDL语言编程源码之3--伽罗华域乘法器设计-Proficient in language programming verilog HDL source of 3- Galois field multiplier design
Platform: | Size: 1024 | Author: 李平 | Hits:

[VHDL-FPGA-Verilog] GFmultiply

Description: Verilog hdl语言 伽罗华域GF（q）乘法器设计，可使用modelsim进行仿真-Language Verilog hdl Galois field GF (q) multiplier design, can use the ModelSim simulation
Platform: | Size: 2048 | Author: 许立宾 | Hits:

[VHDL-FPGA-Verilog] Galois_field_multiplier_verilog_design

Description: 伽罗华域GF（q）乘法器verilog设计.rar-Galois field GF (q) multiplier verilog design.rar
Platform: | Size: 2048 | Author: 海天之洲 | Hits:

[VHDL-FPGA-Verilog] ff_mul

Description: 基于rs编码器的verilog伽罗华域乘法器设计-Rs encoder based on Galois field multiplier verilog
Platform: | Size: 1024 | Author: 吴 | Hits:

[VHDL-FPGA-Verilog] chengfaqi

Description: 通过verilog hdl语言实现伽罗华域GF（q）乘法器设计-By verilog hdl language Galois field GF (q) Multiplier
Platform: | Size: 2048 | Author: 李永超 | Hits:

[VHDL-FPGA-Verilog] GF乘法器

Description: 伽罗华域乘法器设计，包含了两个模块，设计较为简单(Galois field multiplier design, contains two modules, the design is relatively simple)
Platform: | Size: 1024 | Author: 未曾走远 | Hits:

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